Wednesday, November 30, 2011

Time passes

Long Time no updates, which does not mean I abandonned the project.

In the meantime, I was able to find a solution to do the Level Conversion ...

This is the new FPGA-2-IEC-Board with the Level-Converter (5 Signals) on top:

(BTW: Those two boards are the first PCBs I etched myself using the method described here:

Further I have found a new FPGA-Board with enough I/O for nice Stuff like a Cartridge Port or real Joystick ports. As the new Board does not have a VGA-Connector, so I need to make a new VideoConverter-Board too. This should keep me busy for the rest of this year....

Sunday, September 11, 2011

BadCopy by Emulamer - 66% success

As I've no real updates to present.....

Emulamer striked again at the Dekadence Dataparty 2011 with "BadCopy"

As of today, BadCopy does not work 100% on any emulator yet, also not on the Chameleon.

There seem to be 3 emufuxxors (Sprite, Music, "Picture") in this demo.

And well, it also fails on my FPGA :) While the sprite is correctly hidden, and the right music is played, the "Picture" shows the wrong charset... 66% success - better than nothing.

Saturday, August 20, 2011

Thank you for all the Help!

I got many Mail with inputs how to solve my problems - thank you very much for support!

So the first thing I'm gonna do is to build some level-converters as on this page:

First I will try to get the SID-Socket running with a real SID and BiDir (the current solution is "write only" to the SID).

Wednesday, July 27, 2011

The Creative Break.....

.... didn't yield any fruits.

I'm stuck at several ends at the moment, mostly hardware-related as

- How to interface a larger number of 5V BiDir-Port to a 3.3V FPGA (Cartridge Ports and such)

- How to build some kind of SDCard-to-SPI-Interface which would enable upgrading the FPGA-Core, simpler than using a byteblaster.
As soon as I have figured out all hardware issues, I could advance to next next step(s)

On the HDL-Side, I can say that the solution fairly usable yet :) CPU/VIC/CIA are doing mostly fine, for the SID we have the SwinSid...

If anyone of you out there have any knowledge to share and would like to participate with this project, please contact me at!

Wednesday, June 15, 2011

SpriteEnableX fixed

Thinking about Emulamer, I just had to fix the "SpriteEnable"-Stuff (Sprites can have DMA turned on, but still they can be inactive). Vice 2.3 (normal Version) fails at some of those tests, we (and Vice SC) pass all now :)
(Sidenote: Ruined Art still not working...)

Flatline by Emulamer works

Just stumbled across this today: Flatline by Emulamer - well, seems FPGA64 is finally "a halfway decent emulator". No fixing was required, it just worked...
FYI: Ruined Art/Emulamer does not work (yet).... my Sprite-Handling is still too buggy at some places.

Monday, June 13, 2011

$D013-Stable-Interrupts added..

After wondering why some parts of Crest Light bugged, I had to learn that there is another way to create stable rasters using CIA1 and LP (in short: you can trigger an update of $d013 (LightPen X) and $d014 (LightPen Y) by changing bit 4 of Port B of CIA1, as this Pin is connected to the LP-In of the VIC). Before, four parts of Crest Light where buggy, now the whole demo runs perfect.

Some screens:

Wednesday, June 8, 2011

Krestage 3 / Crest working

The 9th sprite was always there, now finally the VIC-Emulation also displays the 50 pixel wide sprites and the correct colors/data between the multicolor- and the FLI-Picture.

Sunday, June 5, 2011

Edge of Disgrace / Booze Design with the latest VIC-Revision

Almost all bugs sorted out! Needed quite some VIC-Fiddeling for some stuff to display properly, but now it's as good as it get's. For the remaining glitches I have no idea where they come from :)

Thursday, May 19, 2011

Finally... Edge of Disgrace is working!

Still some glitches here and there, but I feel confident about those... Thanks HCL for support ;)

Friday, May 6, 2011

Sneak-a-Peek of Edge of Disgrace.....

....but only the last diskside. Slowly I'm getting closer, fixing bug by bug. But still a long way to go....

Sunday, April 24, 2011

Let there be....SOUND

Finally no more silence! I went the secure way and soldered a SID-Socket to the board. It's tested with a SwinSid, I don't have 12V and don't want to fry neither a real SID nor my FPGA-Board. For better sound, the Audio-Out from the SwinSid is connected to a real C64 SID-Socket, because I don't have the right parts to remake this part of the C64 mainboard (which also needs 12V).

Looks..erm.. funny.. but works great! On top of the FPGA-Board you can see the SwinSid, which is connected directly to the I/O of the FPGA. On the left it's a small board which is 1:1 a remade of the C64-Hardware (CIA <-> IEC Bus). On the bottom, you see a SD2IEC (left) and the AD725-Board (right).

Another perspective.. the two yellow cables go from the SwinSid into the C64-Sid Socket (Audio Out and Ground). Works fine, as long nobody touches something...

And here's Oneder / Oxyron :)

Monday, April 18, 2011

NUFLI working

After turning around in circles NUFLI finally works - thank to the guys over at CSDB and an addendum of Christian Bauer's VIC-II Text! This fix also fixes the "face" from Deux Ex Machina and the 5-Sprites-Over-Fli from Demus Interruptus, and hopefully others too :)

Here some "work-stages" (the FLI-Bug is still not emulated..that's why it looks not quite right on the left).

Tuesday, April 12, 2011

VIC-II / CIA / 65xx Cracks needed

I'm looking for people who can help debugging the FPGA64 by providing some small test-programms (like f.ex. a stable raster with different numbers of sprites active on, around or outside a badline).

Just small pieces of code which can help locate bugs easy :)

Please drop me a mail to!

Thank you :)

Tuesday, April 5, 2011

New Test: Deux Ex Machina

Almost perfect :)

Silly, but powerful, bug fixed....

A silly bug in the ram-bus caused that all writes to $d000 - $dfff went to Nirvana instead of RAM (with I/O-area turned off). Compatibility has improved a lot, many games that bugged/crashed before (like Bruce Lee, Bubble Bobble, Commando, Rambo II) are working fine now.

Saturday, April 2, 2011

Some Videos

As promised, here some videos.

All debugging was made based on games like Kickman, The Pit, Save New York - so I'm still surprised that it's working that great.. But to "perfect" it's still a long way to go.

Cycle / Booze Design. Looking fine, except the plasmas....

EoD / Booze Design. Intro is perfect, rest havocs and crashes. Still better than nothing!

Friday, April 1, 2011

Major Update - Video to come soon!

Did some major updates the last weeks. (I know it's April 1st, but no jokes here!)

The AD725 for color-video is here and working. Now it finally looks like a real C64!

Serial I/O:
Yes, I was finally able to hook a 1541 and load stuff (just finished this morning around 3am)!
From the things I've already tried, I need to say that I was positively surprised how good the implementation already works (remember: all debugging so far was made using 8k-Cartridge Files from 1982/1983 only!).

As far as I can tell, fastloaders seem to work fine, also the Sprite- and IRQ-Timing (VIC) seems to be cycle exact (IRQs are stable and borders open as they should). The first Side of We Are New/Fairlight runs almost perfect (except heavy gfx-glitches on the "disco"-part). The Last Ninja II works without any visible differences to a real C64. Also interlace-modes (tried from Soiled Legacy/Resource) are working fine with no visible difference to the real thing. So it will pass emusuxX0r for sure :)

There are still many issues to fix. AGSP/VSP-Stuff just cannot work properly as of now, so is sprite stretching/crunching. Also xScroll is still a little buggy on some modes, so are the CIAs.

Tonight I need to invest some time into "Hardware". Currently I connect 5 Pins of the FPGA thru a 3.3 <-> 5V Level Converter directly on the CIA2-socket of an old C64-Board (with removed CIAs). From there, I connected a 1541. This method just leaves a big mess on my desk, and there is no place left to hook a second C64 which should serve as a "DJ" for my 1541 Ultimate.
I need to rebuild parts of the C64-Board, so I can connect a Floppy directly. As an old 1541 just went up in smoke yesterday, I can use the parts from there ;)

Test-Setup: the FPGA is connected to the CIA2, which goes to the floppy...

Close up. The board in the front is the AD725 converter.

"Final" Test-Setup: the C64-Board Board is powered by the FPGA now, and the Floppy is connected to.... 1541 Ultimate on another C64, which is connected to.... PC with a Grabber-Device....

Thursday, March 10, 2011

Update Week 10

Nearly all games are working - at least the ones I can try (8k-Cartridges only). The sprite-implementation is still beta, and the accesses are not 100% cycle-exact, so tricks like Sprite-Strechting/Crunching will not work properly. Badline-stuff as FLI or FLD should work, but it's not tested. Collisions seem to work ok.

I will be off for holidays now, but will come back after 3 weeks with an AD725-Board (for colour video) and some 3.3V - 5V bus switch ICs (for the IEC-Bus, and maybe for a SID-Socket for proper Sound) - then I can start to do real tests with heavy games/demos.

Sunday, February 27, 2011

Ultimax / Sprites added

Ultimax-Module-Support has been added, so finally I can load the first game I've ever owned: Radar Rat Race!

Basic Sprice-Support added: The VIC-II can now display all 8 sprites, but only unexpanded and in single-color mode, no collisions. It's still a little buggy at the moment, but for the radar of Radar Rat Race it's ok. I also need invest some more time into the BA / AEC-Signals for proper, cycle-exact emulation.

Tuesday, February 22, 2011

Update Week 08

The first commercial games are working! After implementing VIC-Raster-IRQs, almost all games I've tried are loading up and starting - with the "little" drawback that there are still no sprites, and I can only load 8k-Cartridges at $8000 - $9fff.

As of now, Gridrunner (Hires-Text) and Galaxian (Multicolor-Bitmap) are working perfectly, so does Pipes (except parts of the title screen which are made out of sprites).

Friday, February 11, 2011

It's alive!

The first working version of my current project "C64 on an FPGA"!

Running on an Altera Cyclone II FPGA Dev-Board.

It's still in a very early stage. The CPU is pretty final, the other chips (VIC, CIA & Co.) only do what they need to do to get a very basic system running (e.g. the VIC does badlines for proper charmode, but no sprites or IRQs). SID is not implemented at all for the moment.

Video-Out is limited to black and white, as I'm still waiting for the ordered Video-DAC. The PAL-Signal is generated directly from the FPGA, using a minimal R2R-Net. The VIC would already be able to output 16 colors.

Tuesday, February 1, 2011

The Hardware

This C64 on an FPGA-Project runs on this Board:

Core of the Board is an Altera Cyclone-II EP2C8Q208 FPGA. Although it's 'only' a mid-range FPGA, it offers enough power and logic units to hold a whole C64 including all the ROMs and the Color-RAM. For the normal 64k Ram, there is a 512Mbit SRAM on the board.

The Board does not have a Video/Composite-Out, so right now I'm abusing the HSync- and VSync-Pins of the VGA to generate 4 Signal Levels (Sync, Black, Grey and White) using a simple technique with 2 resistors (Based on the PIC Composite Out on Rickard's electronic project page (

The Video is only greyscale now, using a 32Mhz-Pulse Signal to get 9 Luma-Levels. They are far from beeing accurate, but the quality on a 1084 is fairly good. I'm going to visit the manufacturer of the FPGA-Board in march, he has prepared an AD725-Expansion for the board. The VIC-II Entity does already forward a 4Bit-Color-Index-Signal as well as HSync and VSync to the VideoOut-Entity, so the implementation of the AD725 should be quite easy.

There is no input besides the PS/2-Keyboard yet, I cannot plug a 1541 or anything. A bus driver IC, needed for the proper 5v <-> 3.3v Level Shifting, is on the way. At the moment, I can only compile 8k- and Ultimax-Cartridge-Files into the FPGA's Blockram.

The speed is virtually identical to a PAL C64 - the Master-Clock of the Board is 50Mhz, which goes into a PLL with a ratio of 29/46, giving an output clock of 31.5217MHz. This clock is divided again by 4 to get the pixel-clock (7.880 MHz), or by 32 to get the system clock (985054 Hz). Compared to the precise MHz figures at CodeBase64 (985248 Hz), it's less than 200 Hz off - 0.02%!